8352504: RISC-V: implement and enable CMoveI/L

src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp

@@ -2170,13 +2170,15 @@ void C2_MacroAssembler::enc_cmove_cmp_fp(int cmpFlag, FloatRegister op1, FloatRe
       cmov_cmp_fp_le(op1, op2, dst, src, is_single);
       break;
     case BoolTest::ge:
-      cmov_cmp_fp_ge(op1, op2, dst, src, is_single);
+      assert(false, "Should go to BoolTest::le case");
+      ShouldNotReachHere();
       break;
     case BoolTest::lt:
       cmov_cmp_fp_lt(op1, op2, dst, src, is_single);
       break;
     case BoolTest::gt:
-      cmov_cmp_fp_gt(op1, op2, dst, src, is_single);
+      assert(false, "Should go to BoolTest::lt case");
+      ShouldNotReachHere();
       break;
     default:
       assert(false, "unsupported compare condition");

src/hotspot/cpu/riscv/macroAssembler_riscv.cpp

@@ -1328,9 +1328,13 @@ void MacroAssembler::cmov_cmp_fp_ne(FloatRegister cmp1, FloatRegister cmp2, Regi
 }
 
 // When cmp1 <= cmp2 or any of them is NaN then dst = src, otherwise, dst = dst
-// Clarification:
-//   java code      :  cmp2 < cmp1 ? dst : src
-//   transformed to :  CMove dst, (cmp1 le cmp2), dst, src
+// Clarification
+//   scenario 1:
+//     java code      :  cmp2 < cmp1 ? dst : src
+//     transformed to :  CMove dst, (cmp1 le cmp2), dst, src
+//   scenario 2:
+//     java code      :  cmp1 > cmp2 ? dst : src
+//     transformed to :  CMove dst, (cmp1 le cmp2), dst, src
 void MacroAssembler::cmov_cmp_fp_le(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
   if (UseZicond) {
     if (is_single) {
@@ -1355,18 +1359,14 @@ void MacroAssembler::cmov_cmp_fp_le(FloatRegister cmp1, FloatRegister cmp2, Regi
   bind(no_set);
 }
 
-// Clarification:
-//   java code      :  cmp1 > cmp2 ? dst : src
-//   transformed to :  CMove dst, (cmp1 le cmp2), dst, src
-// So, cmov_le_fp is invoked instead this method.
-void MacroAssembler::cmov_cmp_fp_ge(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
-  Unimplemented();
-}
-
 // When cmp1 < cmp2 or any of them is NaN then dst = src, otherwise, dst = dst
-// Clarification:
-//   java code      :  cmp2 <= cmp1 ? dst : src
-//   transformed to :  CMove dst, (cmp1 lt cmp2), dst, src
+// Clarification
+//   scenario 1:
+//     java code      :  cmp2 <= cmp1 ? dst : src
+//     transformed to :  CMove dst, (cmp1 lt cmp2), dst, src
+//   scenario 2:
+//     java code      :  cmp1 >= cmp2 ? dst : src
+//     transformed to :  CMove dst, (cmp1 lt cmp2), dst, src
 void MacroAssembler::cmov_cmp_fp_lt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
   if (UseZicond) {
     if (is_single) {
@@ -1391,13 +1391,6 @@ void MacroAssembler::cmov_cmp_fp_lt(FloatRegister cmp1, FloatRegister cmp2, Regi
   bind(no_set);
 }
 
-// Clarification:
-//   java code      :  cmp2 <= cmp1 ? dst : src
-//   transformed to :  CMove dst, (cmp1 lt cmp2), dst, src
-void MacroAssembler::cmov_cmp_fp_gt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
-  Unimplemented();
-}
-
 // Float compare branch instructions
 
 #define INSN(NAME, FLOATCMP, BRANCH)                                                                                    \

src/hotspot/cpu/riscv/macroAssembler_riscv.hpp

@@ -660,9 +660,7 @@ class MacroAssembler: public Assembler {
   void cmov_cmp_fp_eq(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
   void cmov_cmp_fp_ne(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
   void cmov_cmp_fp_le(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
-  void cmov_cmp_fp_ge(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
   void cmov_cmp_fp_lt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
-  void cmov_cmp_fp_gt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
 
  public:
   // We try to follow risc-v asm menomics.

test/hotspot/jtreg/compiler/lib/ir_framework/TestFramework.java

@@ -146,6 +146,7 @@ public class TestFramework {
                     "UseRVV",
                     "UseZbb",
                     "UseZfh",
+                    "UseZicond",
                     "UseZvbb"
             )
     );