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Commit 62fa33a

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author
Jatin Bhateja
committedMar 5, 2025
8351158: Incorrect APX EGPR register save ordering
Reviewed-by: kvn, sviswanathan
1 parent 20ea218 commit 62fa33a

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-18
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+17
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‎src/hotspot/cpu/x86/sharedRuntime_x86_64.cpp

+17-18
Original file line numberDiff line numberDiff line change
@@ -101,24 +101,23 @@ class RegisterSaver {
101101
ymm_off = xmm_off + (XSAVE_AREA_YMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
102102
DEF_YMM_OFFS(0),
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DEF_YMM_OFFS(1),
104-
// 2..15 are implied in range usage
105-
r31_off = xmm_off + (XSAVE_AREA_EGPRS - XSAVE_AREA_BEGIN)/BytesPerInt,
106-
r31H_off,
107-
r30_off, r30H_off,
108-
r29_off, r29H_off,
109-
r28_off, r28H_off,
110-
r27_off, r27H_off,
111-
r26_off, r26H_off,
112-
r25_off, r25H_off,
113-
r24_off, r24H_off,
114-
r23_off, r23H_off,
115-
r22_off, r22H_off,
116-
r21_off, r21H_off,
117-
r20_off, r20H_off,
118-
r19_off, r19H_off,
119-
r18_off, r18H_off,
104+
r16_off = xmm_off + (XSAVE_AREA_EGPRS - XSAVE_AREA_BEGIN)/BytesPerInt,
105+
r16H_off,
120106
r17_off, r17H_off,
121-
r16_off, r16H_off,
107+
r18_off, r18H_off,
108+
r19_off, r19H_off,
109+
r20_off, r20H_off,
110+
r21_off, r21H_off,
111+
r22_off, r22H_off,
112+
r23_off, r23H_off,
113+
r24_off, r24H_off,
114+
r25_off, r25H_off,
115+
r26_off, r26H_off,
116+
r27_off, r27H_off,
117+
r28_off, r28H_off,
118+
r29_off, r29H_off,
119+
r30_off, r30H_off,
120+
r31_off, r31H_off,
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opmask_off = xmm_off + (XSAVE_AREA_OPMASK_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
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DEF_OPMASK_OFFS(0),
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DEF_OPMASK_OFFS(1),
@@ -265,7 +264,7 @@ OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_
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if (UseAPX) {
266265
int base_addr = XSAVE_AREA_EGPRS;
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off = 0;
268-
for(int n = 16; n < Register::number_of_registers; n++) {
267+
for (int n = 16; n < Register::number_of_registers; n++) {
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__ movq(Address(rsp, base_addr+(off++*8)), as_Register(n));
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}
271270
}

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