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kuaiweiVladimir Kozlov
authored and
Vladimir Kozlov
committedMar 6, 2024
8326983: Unused operands reported after JDK-8326135
Reviewed-by: kvn, vlivanov
1 parent 9f70940 commit e92ecd9

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10 files changed

+27
-976
lines changed

10 files changed

+27
-976
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‎src/hotspot/cpu/aarch64/aarch64.ad

-440
Large diffs are not rendered by default.

‎src/hotspot/cpu/arm/arm.ad

-101
Original file line numberDiff line numberDiff line change
@@ -1737,56 +1737,6 @@ operand immI0() %{
17371737
interface(CONST_INTER);
17381738
%}
17391739

1740-
// Integer Immediate: the value 1
1741-
operand immI_1() %{
1742-
predicate(n->get_int() == 1);
1743-
match(ConI);
1744-
op_cost(0);
1745-
1746-
format %{ %}
1747-
interface(CONST_INTER);
1748-
%}
1749-
1750-
// Integer Immediate: the value 2
1751-
operand immI_2() %{
1752-
predicate(n->get_int() == 2);
1753-
match(ConI);
1754-
op_cost(0);
1755-
1756-
format %{ %}
1757-
interface(CONST_INTER);
1758-
%}
1759-
1760-
// Integer Immediate: the value 3
1761-
operand immI_3() %{
1762-
predicate(n->get_int() == 3);
1763-
match(ConI);
1764-
op_cost(0);
1765-
1766-
format %{ %}
1767-
interface(CONST_INTER);
1768-
%}
1769-
1770-
// Integer Immediate: the value 4
1771-
operand immI_4() %{
1772-
predicate(n->get_int() == 4);
1773-
match(ConI);
1774-
op_cost(0);
1775-
1776-
format %{ %}
1777-
interface(CONST_INTER);
1778-
%}
1779-
1780-
// Integer Immediate: the value 8
1781-
operand immI_8() %{
1782-
predicate(n->get_int() == 8);
1783-
match(ConI);
1784-
op_cost(0);
1785-
1786-
format %{ %}
1787-
interface(CONST_INTER);
1788-
%}
1789-
17901740
// Int Immediate non-negative
17911741
operand immU31()
17921742
%{
@@ -1917,27 +1867,6 @@ operand limmIn() %{
19171867
interface(CONST_INTER);
19181868
%}
19191869

1920-
1921-
// Long Immediate: the value FF
1922-
operand immL_FF() %{
1923-
predicate( n->get_long() == 0xFFL );
1924-
match(ConL);
1925-
op_cost(0);
1926-
1927-
format %{ %}
1928-
interface(CONST_INTER);
1929-
%}
1930-
1931-
// Long Immediate: the value FFFF
1932-
operand immL_FFFF() %{
1933-
predicate( n->get_long() == 0xFFFFL );
1934-
match(ConL);
1935-
op_cost(0);
1936-
1937-
format %{ %}
1938-
interface(CONST_INTER);
1939-
%}
1940-
19411870
// Pointer Immediate: 32 or 64-bit
19421871
operand immP() %{
19431872
match(ConP);
@@ -1957,36 +1886,6 @@ operand immP0() %{
19571886
interface(CONST_INTER);
19581887
%}
19591888

1960-
// Pointer Immediate
1961-
operand immN()
1962-
%{
1963-
match(ConN);
1964-
1965-
op_cost(10);
1966-
format %{ %}
1967-
interface(CONST_INTER);
1968-
%}
1969-
1970-
operand immNKlass()
1971-
%{
1972-
match(ConNKlass);
1973-
1974-
op_cost(10);
1975-
format %{ %}
1976-
interface(CONST_INTER);
1977-
%}
1978-
1979-
// Null Pointer Immediate
1980-
operand immN0()
1981-
%{
1982-
predicate(n->get_narrowcon() == 0);
1983-
match(ConN);
1984-
1985-
op_cost(0);
1986-
format %{ %}
1987-
interface(CONST_INTER);
1988-
%}
1989-
19901889
operand immL() %{
19911890
match(ConL);
19921891
op_cost(40);

‎src/hotspot/cpu/arm/arm_32.ad

+9-34
Original file line numberDiff line numberDiff line change
@@ -501,31 +501,6 @@ operand immIRotn() %{
501501
interface(CONST_INTER);
502502
%}
503503

504-
operand immIRotneg() %{
505-
// if AsmOperand::is_rotated_imm() is true for this constant, it is
506-
// a immIRot and an optimal instruction combination exists to handle the
507-
// constant as an immIRot
508-
predicate(!AsmOperand::is_rotated_imm(n->get_int()) && AsmOperand::is_rotated_imm(-n->get_int()));
509-
match(ConI);
510-
511-
op_cost(0);
512-
// formats are generated automatically for constants and base registers
513-
format %{ %}
514-
interface(CONST_INTER);
515-
%}
516-
517-
// Non-negative integer immediate that is encodable using the rotation scheme,
518-
// and that when expanded fits in 31 bits.
519-
operand immU31Rot() %{
520-
predicate((0 <= n->get_int()) && AsmOperand::is_rotated_imm(n->get_int()));
521-
match(ConI);
522-
523-
op_cost(0);
524-
// formats are generated automatically for constants and base registers
525-
format %{ %}
526-
interface(CONST_INTER);
527-
%}
528-
529504
operand immPRot() %{
530505
predicate(n->get_ptr() == 0 || (AsmOperand::is_rotated_imm(n->get_ptr()) && ((ConPNode*)n)->type()->reloc() == relocInfo::none));
531506

@@ -546,15 +521,15 @@ operand immLlowRot() %{
546521
interface(CONST_INTER);
547522
%}
548523

549-
operand immLRot2() %{
550-
predicate(AsmOperand::is_rotated_imm((int)(n->get_long() >> 32)) &&
551-
AsmOperand::is_rotated_imm((int)(n->get_long())));
552-
match(ConL);
553-
op_cost(0);
554-
555-
format %{ %}
556-
interface(CONST_INTER);
557-
%}
524+
//operand immLRot2() %{
525+
// predicate(AsmOperand::is_rotated_imm((int)(n->get_long() >> 32)) &&
526+
// AsmOperand::is_rotated_imm((int)(n->get_long())));
527+
// match(ConL);
528+
// op_cost(0);
529+
//
530+
// format %{ %}
531+
// interface(CONST_INTER);
532+
//%}
558533

559534
// Integer Immediate: 12-bit - for addressing mode
560535
operand immI12() %{

‎src/hotspot/cpu/ppc/ppc.ad

-21
Original file line numberDiff line numberDiff line change
@@ -4388,27 +4388,6 @@ operand rarg1RegL() %{
43884388
interface(REG_INTER);
43894389
%}
43904390

4391-
operand rarg2RegL() %{
4392-
constraint(ALLOC_IN_RC(rarg2_bits64_reg));
4393-
match(iRegLdst);
4394-
format %{ %}
4395-
interface(REG_INTER);
4396-
%}
4397-
4398-
operand rarg3RegL() %{
4399-
constraint(ALLOC_IN_RC(rarg3_bits64_reg));
4400-
match(iRegLdst);
4401-
format %{ %}
4402-
interface(REG_INTER);
4403-
%}
4404-
4405-
operand rarg4RegL() %{
4406-
constraint(ALLOC_IN_RC(rarg4_bits64_reg));
4407-
match(iRegLdst);
4408-
format %{ %}
4409-
interface(REG_INTER);
4410-
%}
4411-
44124391
// Pointer Destination Register
44134392
// See definition of reg_class bits64_reg_rw.
44144393
operand iRegPdst() %{

‎src/hotspot/cpu/riscv/riscv.ad

-40
Original file line numberDiff line numberDiff line change
@@ -2966,19 +2966,6 @@ operand immL_M1()
29662966
%}
29672967

29682968

2969-
// 32 bit offset of pc in thread anchor
2970-
2971-
operand immL_pc_off()
2972-
%{
2973-
predicate(n->get_long() == in_bytes(JavaThread::frame_anchor_offset()) +
2974-
in_bytes(JavaFrameAnchor::last_Java_pc_offset()));
2975-
match(ConL);
2976-
2977-
op_cost(0);
2978-
format %{ %}
2979-
interface(CONST_INTER);
2980-
%}
2981-
29822969
// 64 bit integer valid for add immediate
29832970
operand immLAdd()
29842971
%{
@@ -3186,17 +3173,6 @@ operand iRegLNoSp()
31863173
interface(REG_INTER);
31873174
%}
31883175

3189-
// Long 64 bit Register R28 only
3190-
operand iRegL_R28()
3191-
%{
3192-
constraint(ALLOC_IN_RC(r28_reg));
3193-
match(RegL);
3194-
match(iRegLNoSp);
3195-
op_cost(0);
3196-
format %{ %}
3197-
interface(REG_INTER);
3198-
%}
3199-
32003176
// Long 64 bit Register R29 only
32013177
operand iRegL_R29()
32023178
%{
@@ -3694,22 +3670,6 @@ operand indOffLN(iRegN reg, immLOffset off)
36943670
%}
36953671
%}
36963672

3697-
// RISCV opto stubs need to write to the pc slot in the thread anchor
3698-
operand thread_anchor_pc(javaThread_RegP reg, immL_pc_off off)
3699-
%{
3700-
constraint(ALLOC_IN_RC(ptr_reg));
3701-
match(AddP reg off);
3702-
op_cost(0);
3703-
format %{ "[$reg, $off]" %}
3704-
interface(MEMORY_INTER) %{
3705-
base($reg);
3706-
index(0xffffffff);
3707-
scale(0x0);
3708-
disp($off);
3709-
%}
3710-
%}
3711-
3712-
37133673
//----------Special Memory Operands--------------------------------------------
37143674
// Stack Slot Operand - This operand is used for loading and storing temporary
37153675
// values on the stack where a match requires a value to

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