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Commit 153ad91

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author
Sandhya Viswanathan
committedOct 21, 2024
8338126: C2 SuperWord: VectorCastF2HF / vcvtps2ph produces wrong results for vector length 2
Reviewed-by: thartmann, jbhateja, epeter
1 parent 80ec552 commit 153ad91

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3 files changed

+28
-7
lines changed

3 files changed

+28
-7
lines changed
 

‎src/hotspot/cpu/x86/x86.ad

+1
Original file line numberDiff line numberDiff line change
@@ -3686,6 +3686,7 @@ instruct vconvF2HF(vec dst, vec src) %{
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%}
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36883688
instruct vconvF2HF_mem_reg(memory mem, vec src) %{
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predicate(n->as_StoreVector()->memory_size() >= 16);
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match(Set mem (StoreVector mem (VectorCastF2HF src)));
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format %{ "vcvtps2ph $mem,$src" %}
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ins_encode %{

‎test/hotspot/jtreg/compiler/lib/ir_framework/test/IREncodingPrinter.java

+2-1
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,8 @@ public class IREncodingPrinter {
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"sve",
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// Riscv64
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"rvv",
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"zvbb"
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"zvbb",
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"zvfh"
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));
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public IREncodingPrinter() {

‎test/hotspot/jtreg/compiler/vectorization/TestFloatConversionsVector.java

+25-6
Original file line numberDiff line numberDiff line change
@@ -26,9 +26,6 @@
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* @bug 8294588
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* @summary Auto-vectorize Float.floatToFloat16, Float.float16ToFloat APIs
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* @requires vm.compiler2.enabled
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* @requires (os.simpleArch == "x64" & (vm.cpu.features ~= ".*avx512f.*" | vm.cpu.features ~= ".*f16c.*")) |
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* os.arch == "aarch64" |
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* (os.arch == "riscv64" & vm.cpu.features ~= ".*zvfh.*")
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* @library /test/lib /
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* @run driver compiler.vectorization.TestFloatConversionsVector
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*/
@@ -53,7 +50,9 @@ public static void main(String args[]) {
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}
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@Test
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@IR(counts = {IRNode.VECTOR_CAST_F2HF, IRNode.VECTOR_SIZE + "min(max_float, max_short)", "> 0"})
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@IR(counts = {IRNode.VECTOR_CAST_F2HF, IRNode.VECTOR_SIZE + "min(max_float, max_short)", "> 0"},
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applyIfPlatformOr = {"x64", "true", "aarch64", "true", "riscv64", "true"},
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applyIfCPUFeatureOr = {"f16c", "true", "avx512f", "true", "zvfh", "true", "asimd", "true", "sve", "true"})
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public void test_float_float16(short[] sout, float[] finp) {
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for (int i = 0; i < finp.length; i++) {
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sout[i] = Float.floatToFloat16(finp[i]);
@@ -67,7 +66,16 @@ public void test_float_float16_strided(short[] sout, float[] finp) {
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}
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}
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@Run(test = {"test_float_float16", "test_float_float16_strided"}, mode = RunMode.STANDALONE)
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@Test
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public void test_float_float16_short_vector(short[] sout, float[] finp) {
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for (int i = 0; i < finp.length; i+= 4) {
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sout[i+0] = Float.floatToFloat16(finp[i+0]);
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sout[i+1] = Float.floatToFloat16(finp[i+1]);
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}
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}
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@Run(test = {"test_float_float16", "test_float_float16_strided",
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"test_float_float16_short_vector"}, mode = RunMode.STANDALONE)
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public void kernel_test_float_float16() {
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finp = new float[ARRLEN];
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sout = new short[ARRLEN];
@@ -93,10 +101,21 @@ public void kernel_test_float_float16() {
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for (int i = 0; i < ARRLEN/2; i++) {
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Asserts.assertEquals(Float.floatToFloat16(finp[i*2]), sout[i*2]);
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}
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for (int i = 0; i < ITERS; i++) {
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test_float_float16_short_vector(sout, finp);
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}
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// Verifying the result
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for (int i = 0; i < ARRLEN; i++) {
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Asserts.assertEquals(Float.floatToFloat16(finp[i]), sout[i]);
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}
96113
}
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@Test
99-
@IR(counts = {IRNode.VECTOR_CAST_HF2F, IRNode.VECTOR_SIZE + "min(max_float, max_short)", "> 0"})
116+
@IR(counts = {IRNode.VECTOR_CAST_HF2F, IRNode.VECTOR_SIZE + "min(max_float, max_short)", "> 0"},
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applyIfPlatformOr = {"x64", "true", "aarch64", "true", "riscv64", "true"},
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applyIfCPUFeatureOr = {"f16c", "true", "avx512f", "true", "zvfh", "true", "asimd", "true", "sve", "true"})
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public void test_float16_float(float[] fout, short[] sinp) {
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for (int i = 0; i < sinp.length; i++) {
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fout[i] = Float.float16ToFloat(sinp[i]);

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