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8325821: [REDO] use "dmb.ishst+dmb.ishld" for release barrier #19278
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👋 Welcome back kuaiwei! A progress list of the required criteria for merging this PR into |
@kuaiwei This change now passes all automated pre-integration checks. ℹ️ This project also has non-automated pre-integration requirements. Please see the file CONTRIBUTING.md for details. After integration, the commit message for the final commit will be:
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ins_encode %{ | ||
__ block_comment("membar_release"); | ||
__ membar(Assembler::LoadStore|Assembler::StoreStore); | ||
__ membar(Assembler::StoreStore); |
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Do we need to respect AlwaysMergeDMB
here?
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Yes, usually they can be merged in macroAssembler. but it can help to reduce the possibility of unmerged case. Thanks to point it.
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I checked code again. They will be merged if enable AlwaysMergeDMB. So we can skip the check.
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Add a comment:
// These will be merged if AlwaysMergeDMB is enabled.
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Comment added.
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Cursory review:
asm_check((const unsigned int *)code.insts()->start(), insns, sizeof insns / sizeof insns[0]); | ||
} | ||
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TEST_VM(AssemblerAArch64, merge_ldst) { |
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This test seems to be irrelevant for the issue at hand? Tests ld/st
-> ldp/stp
merging, not the barrier merges?
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In this patch, I fixed an issue, dmb/st/ld may not merge if CodeBuffer is expanding, I added some unit tests to check it.
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Aha. So the logic is that the same issue that affects dmb
merging also affects ldp
merging? All right, it's fine to leave it here then.
printf("%s\n", ss.as_string()); | ||
} | ||
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TEST_VM(AssemblerAArch64, merge_dmb) { |
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Given the previous experience with barrier merges that prompted the backout, I would prefer to have a more comprehensive test here, maybe an additional one. I am thinking something like the exhaustive combination of 4 back-to-back barriers of each of 5 types. This gives us 5^4 = 625 test cases, which I think is still manageable.
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Test is added as merge_dmb_all_kinds
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Right. I was implicitly thinking that we can do this without coding the explicit patterns into the test. As it stands now, it is hard to check that generated patterns are actually correct. Let me see if I can whip up a sample of what I had in mind.
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I was thinking about this: improve-tests.patch. Note how it uses the constants for better readability, and also runs the test in both AlwaysMergeDMB
modes. You might want to adapt other tests to similar pattern.
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Thanks for your patch. I patched and add few sanity check.
This looks ready to me. I think we need jcstress with C1 and C2, and we should be done. @shipilev , do you agree? |
Yes. Just run jcstress with defaults, maybe limiting the time budget to about 24 hours, and we are done. Default configuration would work through different combinations of C1/C2 compilations for all actors, which is what we want to check for this change: that we don't mess up the barrier emitting scheme in different compilers/interpreters. |
Note that current jcstress run would likely fail due to JDK-8332670. |
I can run the jcstress test. I will run fastdebug build with |
Yes, I think so. |
FTR, I ran Linux AArch64 server release on Graviton 3 instance (ergonomics selects |
Thanks for testing. I'm running jcstress on a neoverse-n2 instance. I got some "soft errs" in console output. Are they real error? |
constexpr uint32_t test_encode_dmb_ld = 0xd50339bf; | ||
constexpr uint32_t test_encode_dmb_st = 0xd5033abf; | ||
constexpr uint32_t test_encode_dmb = 0xd5033bbf; |
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Can you maybe move these to the top, and use these constants across the test? You would not need the comments like 0xd5033abf, // dmb.ishst
then.
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Fixed
asm_check((const unsigned int *)code.insts()->start(), insns, sizeof insns / sizeof insns[0]); | ||
} | ||
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TEST_VM(AssemblerAArch64, merge_ldst) { |
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Aha. So the logic is that the same issue that affects dmb
merging also affects ldp
merging? All right, it's fine to leave it here then.
@@ -150,6 +150,7 @@ class MacroAssembler: public Assembler { | |||
void bind(Label& L) { | |||
Assembler::bind(L); | |||
code()->clear_last_insn(); | |||
code()->set_last_label(pc()); |
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OK, so we have added _last_label
to shared code in codeBuffer
, but only update it in aarch64. This would be surprising for other platforms. On the other hand, this is what we already do with _last_insn
-- only implementing it for specific platforms. Probably fine, but it would be nice to strengthen this with asserts, maybe in separate PR.
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It reminds me it could be applied to riscv. It also need merge membar. I will move this part to a new PR.
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I need _last_label in this patch. I need it to check previous 2 instructions and they are not cross block boundary. I will create a new PR for RISCV only.
Soft errors are API inconsistencies that jcstress harness handled. As long as you don't have new hard errors, you are fine. |
My jcstress test is done and no error is reported. |
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I think we're done here. Thank you for your patience and hard work.
@shipilev, are you happy too?
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Yes, I believe we are done. Good job!
Thanks for your review. |
/integrate |
@theRealAph @shipilev Could you help sponsor it ? |
GH says the branch has conflicts that must be resolved. Merging from master is advisable anyway to avoid merge surprises. Let's do that before integrating. |
Given that the first version of the patch had some issues, I would recommend waiting for the fork tomorrow and only integrating this into JDK 24. |
I'll run this through our correctness and performance testing and report back once it passed. |
How was it, Tobias? Any surprises? |
Sorry for the delay, I had to re-run a subset of the benchmarks due to high variance. All green now. |
Great, thanks for testing. I think we are ready to integrate this now. |
/integrate |
/sponsor |
Going to push as commit 2a242db.
Your commit was automatically rebased without conflicts. |
he origin patch for https://bugs.openjdk.org/browse/JDK-8324186 has 2 issues:
1 It show regression in some platform, like Apple silicon in mac os
2 Can not handle instruction sequence like "dmb.ishld; dmb.ishst; dmb.ishld; dmb.ishld"
It can be fixed by:
1 Enable AlwaysMergeDMB by default, only disable it in architecture we can see performance improvement (N1 or N2)
2 Check the special pattern and merge the subsequent dmb.
It also fix a bug when code buffer is expanding, st/ld/dmb can not be merged. I added unit tests for these.
This patch still has a unhandled case. Insts like "dmb.ishld; dmb.ishst; dmb.ish", it will merge the last 2 instructions and can not merge all three. Because when emitting dmb.ish, if merge all previous dmbs, the code buffer will shrink the size. I think it may break some resumption and think it's not a common pattern.
In previous PR #18467 , I tried an implementation to use state machine for merging. But it looks risky to pending instruction during emitting.
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Using
git
Checkout this PR locally:
$ git fetch https://git.openjdk.org/jdk.git pull/19278/head:pull/19278
$ git checkout pull/19278
Update a local copy of the PR:
$ git checkout pull/19278
$ git pull https://git.openjdk.org/jdk.git pull/19278/head
Using Skara CLI tools
Checkout this PR locally:
$ git pr checkout 19278
View PR using the GUI difftool:
$ git pr show -t 19278
Using diff file
Download this PR as a diff file:
https://git.openjdk.org/jdk/pull/19278.diff
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